IS62WV5128ALLIS62WV5128BLL512K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
•High-speed access time: 55ns, 70ns•CMOS low power operation 36 mW (typical) operating 9 µW (typical) CMOS standby•TTL compatible interface levels•Single power supply
1.65V – 2.2V VDD (IS62WV5128ALL) 2.5V – 3.6V VDD (IS62WV5128BLL)
JANUARY 2008
DESCRIPTION
The ISSI IS62WV5128ALL / IS62WV5128BLL are high-speed, 4M bit static RAMs organized as 512K words by 8bits. It is fabricated using ISSI's high-performance CMOStechnology. This highly reliable process coupled withinnovative circuit design techniques, yields high-performance and low power consumption devices.When CS1 is HIGH (deselected) the device assumes astandby mode at which the power dissipation can bereduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enableand Output Enable inputs. The active LOW Write Enable(WE) controls both writing and reading of the memory.The IS62WV5128ALL and IS62WV5128BLL are packagedin the JEDEC standard 32-pin TSOP (TYPE I), 32-pinsTSOP (TYPE I), 32-pin TSOP (Type II), 32-pin SOP and36-pin mini BGA.
•Fully static operation: no clock or refreshrequired•Three state outputs
•Industrial temperature available•Lead-free available
FUNCTIONAL BLOCK DIAGRAM
A0-A18DECODER512K x 8MEMORY ARRAYVDDGNDI/ODATACIRCUITI/O0-I/O7COLUMN I/OCS1OEWECONTROLCIRCUITCopyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any timewithout notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised toobtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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IS62WV5128ALL, IS62WV5128BLL
PIN DESCRIPTIONS
A0-A18CS1OEWEI/O0-I/O7NCVDDGND
Address InputsChip Enable 1 InputOutput Enable InputWrite Enable InputInput/OutputNo ConnectionPowerGround
36-pin mini BGA (B) (6mm x 8mm)(Package Code B)
1 2 3 4 5 6ABCDEFGHA0I/O4I/O5GNDVDDI/O6I/O7A9A1A2NCWENCA3A4A5A6A7A8I/O0I/O1VDDGNDA18OEA10CS1A11A17A16A12A15A13I/O2I/O3A142Integrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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IS62WV5128ALL, IS62WV5128BLL
PIN DESCRIPTIONS
A0-A18CS1OEWEI/O0-I/O7VDDGND
Address InputsChip Enable 1 InputOutput Enable InputWrite Enable InputInput/OutputPowerGround
PIN CONFIGURATION
32-pin TSOP (TYPE I), (Package Code T)32-pin sTSOP (TYPE I) (Package Code H)
32-pin SOP (Package Code Q)
32-pin TSOP (TYPE II) (Package Code T2)
A11A9A8A13WEA18A15VDDA17A16A14A12A7A6A5A41234567891011121314151632313029282726252423222120191817OEA10CS1I/O7I/O6I/O5I/O4I/O3GNDI/O2I/O1I/O0A0A1A2A3A17A16A14A12A7A6A5A4A3A2A1A0I/O0I/O1I/O2GND1234567891011121314151632313029282726252423222120191817VDDA15A18WEA13A8A9A11OEA10CS1I/O7I/O6I/O5I/O4I/O3Integrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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IS62WV5128ALL, IS62WV5128BLL
OPERATING RANGE (VDD)
RangeCommercialIndustrial
Ambient Temperature
0°C to +70°C–40°C to +85°C
IS62WV5128ALL1.65V - 2.2V1.65V - 2.2V
IS62WV5128BLL 2.5V - 3.6V 2.5V - 3.6V
ABSOLUTE MAXIMUM RATINGS(1)
SymbolVTERMVDDTSTGPT
Parameter
Terminal Voltage with Respect to GNDVDD Related to GNDStorage TemperaturePower Dissipation
Value
–0.2 to VDD+0.3–0.2 to VDD+0.3–65 to +150
1.0
UnitVV°CW
Note:
1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This isa stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periodsmay affect reliability.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
SymbolVOHVOLVIHVIL(1)ILIILO
Parameter
Output HIGH VoltageOutput LOW VoltageInput HIGH VoltageInput LOW VoltageInput LeakageOutput Leakage
GND ≤ VIN ≤ VDD
GND ≤ VOUT ≤ VDD, Outputs DisabledTest ConditionsIOH = -0.1 mAIOH = -1 mAIOL = 0.1 mAIOL = 2.1 mA
VDD1.65-2.2V2.5-3.6V1.65-2.2V2.5-3.6V1.65-2.2V2.5-3.6V1.65-2.2V2.5-3.6V
Min.1.42.2——1.42.2–0.2–0.2–1–1
Max.——0.20.4VDD + 0.2VDD + 0.30.40.611
UnitVVVVVVVVµAµA
Notes:
1.VIL (min.) = –1.0V for pulse width less than 10 ns.
4Integrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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CAPACITANCE(1)
SymbolCINCOUT
ParameterInput CapacitanceInput/Output Capacitance
ConditionsVIN = 0VVOUT = 0V
Max.810
UnitpFpF
Note:
1.Tested initially and after any design or process changes that may affect these parameters.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall TimesInput and Output Timingand Reference LevelOutput Load
IS62WV5128ALL
(Unit)
0.4V to VDD-0.2V
5 nsVREFSee Figures 1 and 2
IS62WV5128BLL
(Unit)
0.4V to VDD-0.3V
5nsVREFSee Figures 1 and 2
IS62WV5128ALL1.65 - 2.2V
R1(Ω)R2(Ω)VREFVTM
307031500.9V1.8V
IS62WV5128BLL2.5V - 3.6V
307031501.5V2.8V
AC TEST LOADS
R1VTMOUTPUT30 pFIncludingjig andscopeR2R1VTMOUTPUT5 pFIncludingjig andscopeR2Figure 1Figure 2Integrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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IS62WV5128ALL, IS62WV5128BLL
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)62WV5128ALL (1.65V - 2.2V)SymbolParameterICCICC1VDD Dynamic OperatingSupply CurrentOperating SupplyCurrentTTL Standby Current(TTL Inputs)Test ConditionsVDD = Max.,IOUT = 0 mA, f = fMAXCom.Ind.Max.70 ns253010100.350.35UnitmAmAISB1VDD = Max., CS1 = 0.2VCom.WE = VDD-0.2VInd.f=1MHZVDD = Max.,Com.VIN = VIH or VILInd.CS1 = VIH,f = 1 MHZVDD = Max.,CS1 ≥ VDD – 0.2V,VIN ≥ VDD – 0.2V, orVIN ≤ 0.2V, f = 0Com.Ind.mAISB2CMOS StandbyCurrent (CMOS Inputs)1515µANote:
1.At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)62WV5128BLL (2.5V - 3.6V)SymbolParameterICCICC1
VDD Dynamic OperatingSupply CurrentOperating SupplyCurrent
TTL Standby Current(TTL Inputs)
Test ConditionsVDD = Max.,
IOUT = 0 mA, f = fMAX
Com.Ind.
Max.55 ns404515150.350.35
UnitmAmA
ISB1
VDD = Max., CS1 = 0.2VCom.WE = VDD-0.2VInd.f=1MHZ
VDD = Max.,Com.
Ind.VIN = VIH or VIL
CS1 = VIH,f = 1 MHZ
VDD = Max.,
CS1 ≥ VDD – 0.2V,VIN ≥ VDD – 0.2V, orVIN ≤ 0.2V, f = 0
Com.Ind.
mA
ISB2
CMOS Standby
Current (CMOS Inputs)1515
µA
Note:
1.At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
6Integrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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IS62WV5128ALL, IS62WV5128BLL
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol
ParameterRead Cycle TimeAddress Access TimeOutput Hold TimeCS1 Access TimeOE Access TimeOE to High-Z OutputOE to Low-Z OutputCS1 to High-Z OutputCS1 to Low-Z Output
55 nsMin.Max.55—10———5010
—55—552520—20—
70 nsMin.Max.70—10———5010
—70—703525—25—
Unitnsnsnsnsnsnsnsnsns
tRCtAAtOHAtACS1tDOEtHZOE(2)tLZOE(2)tHZCS1tLZCS1
Notes:
1.Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 toVDD-0.2V/VDD-0.3V and output loading specified in Figure 1.
2.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OE = VIL, WE = VIH)
tRCADDRESStAAtOHAtOHADATA VALIDDOUTPREVIOUS DATA VALIDIntegrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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IS62WV5128ALL, IS62WV5128BLL
AC WAVEFORMS
READ CYCLE NO. 2(1,3)(CS1, OE Controlled)
tRCADDRESStAAtOHAOEtDOEtHZOECS1tACS1tLZCS1tLZOEtHZCSDATA VALIDDOUTHIGH-ZNotes:
1.WE is HIGH for a Read Cycle.
2.The device is continuously selected. OE, CS1= VIL. WE=VIH.3.Address is valid prior to or coincident with CS1 LOW transition.
8Integrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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IS62WV5128ALL, IS62WV5128BLL
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
Symbol
ParameterWrite Cycle TimeCS1 to Write End
Address Setup Time to Write EndAddress Hold from Write EndAddress Setup TimeWE Pulse WidthData Setup to Write EndData Hold from Write EndWE LOW to High-Z OutputWE HIGH to Low-Z Output
55 nsMin.Max. 554545004025 0—5
————————20—
70 ns Min.Max. 70 60 60 0 0 50 30 0 — 5
————————20—
Unitnsnsnsnsnsnsnsnsnsns
tWCtSCS1tAWtHAtSAtPWEtSDtHD
tHZWE(3)tLZWE(3)
Notes:
1.Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4V toVDD-0.2V/VDD-0.3V and output loading specified in Figure 1.
2.The internal write time is defined by the overlap of CS1 LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive toterminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write.3.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
WRITE CYCLE NO. 1 (CS1 Controlled, OE = HIGH or LOW)
tWCADDRESStSCS1tHACS1tAWWEtSAtHZWEtPWEtLZWEHIGH-ZDOUTDATA UNDEFINEDtSDtHDDINDATA-IN VALIDIntegrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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IS62WV5128ALL, IS62WV5128BLL
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
tWCADDRESSOEtSCS1tHACS1tAWWEtSAtPWEtHZWEHIGH-ZtLZWEDOUTDATA UNDEFINEDtSDtHDDINDATA-IN VALIDWRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)tWCADDRESSOEtSCS1tHACS1tAWWEtSAtPWEtHZWEHIGH-ZtLZWEDOUTDATA UNDEFINEDtSDtHDDINDATA-IN VALID10Integrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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IS62WV5128ALL, IS62WV5128BLL
DATA RETENTION SWITCHING CHARACTERISTICS
SymbolVDRIDRtSDRtRDR
Parameter
VDD for Data RetentionData Retention CurrentData Retention Setup TimeRecovery Time
Test Condition
See Data Retention WaveformVDD = 1.2V, CS1 ≥ VDD – 0.2VSee Data Retention WaveformSee Data Retention Waveform
Min.1.2—0tRC
Max.3.615——
UnitVµAnsns
DATA RETENTION WAVEFORM (CS1 Controlled)
tSDRVDDData Retention ModetRDRVDRCS1 ≥ VDD - 0.2VCS1GNDIntegrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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IS62WV5128ALL, IS62WV5128BLL
ORDERING INFORMATIONIS62WV5128ALL (1.65V-2.2V)Industrial Range: –40°C to +85°C
Speed (ns)
70707070
Order Part No.IS62WV5128ALL-70TIIS62WV5128ALL-70T2IIS62WV5128ALL-70HIIS62WV5128ALL-70BI
PackageTSOP, TYPE ITSOP, TYPE IIsTSOP, TYPE Imini BGA (6mmx8mm)
ORDERING INFORMATIONIS62WV5128BLL (2.5V - 3.6V)Commercial Range: 0°C to +70°C
Speed (ns)
55
Order Part No.IS62WV5128BLL-55H
PackagesTSOP, TYPE I
Industrial Range: –40°C to +85°C
Speed (ns)
555555555555555555
Order Part No.IS62WV5128BLL-55TIIS62WV5128BLL-55TLIIS62WV5128BLL-55QLIIS62WV5128BLL-55T2IIS62WV5128BLL-55T2LIIS62WV5128BLL-55HIIS62WV5128BLL-55HLIIS62WV5128BLL-55BIIS62WV5128BLL-55BLI
PackageTSOP, TYPE I
TSOP, TYPE I, Lead-freeSOP, Lead-freeTSOP, TYPE II
TSOP, TYPE II, Lead-freesTSOP, TYPE I
sTSOP, TYPE I, Lead-freemini BGA (6mmx8mm)
mini BGA (6mmx8mm), Lead-free
12Integrated Silicon Solution, Inc. — www.issi.comRev.E01/29/08
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PACKAGING INFORMATION
Plastic TSOPPackage Code: T (Type II)NN/2+1E1ENotes:1.Controlling dimension: millimieters,unless otherwise specified.2.BSC = Basic lead spacingbetween centers.3.Dimensions D and E1 do notinclude mold flash protrusions andshould be measured from thebottom of the package.4.Formed leads shall be planar withrespect to one another within0.004 inches at the seating plane.1DN/2ZDASEATING PLANE.ebA1LαCSymbolRef. Std.No. Leads (N)324450A—1.20—0.047—1.20—0.047—1.20—0.047A10.050.150.0020.0060.050.150.0020.0060.050.150.0020.006b0.300.520.0120.0200.300.450.0120.0180.300.450.0120.018C0.120.210.0050.0080.120.210.0050.0080.120.210.0050.008D20.8221.080.8200.83018.3118.520.7210.72920.8221.080.8200.830E110.0310.290.3910.40010.0310.290.3950.40510.0310.290.3950.405E11.5611.960.4510.46611.5611.960.4550.47111.5611.960.4550.471e1.27 BSC 0.050 BSC 0.80 BSC0.032 BSC0.80 BSC 0.031 BSCL0.400.600.0160.0240.410.600.0160.0240.400.600.0160.024ZD 0.95 REF 0.037 REF 0.81 REF 0.032 REF 0.88 REF 0.035 REFα0°5°0°5°0°5°0°5°0°5°0°5°MillimetersMinMaxInchesMinMaxPlastic TSOP (T - Type II)MillimetersInchesMinMaxMinMaxMillimetersMinMaxInchesMinMaxCopyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised toobtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.F06/18/03
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PACKAGING INFORMATION
Plastic TSOP-Type IPackage Code: T (32-pin)1EHNDSEATING PLANESAeBA1LαCMILLIMETERSINCHESSymbolMin.Max.Min.Max.No. Leads32A—1.20—0.047A10.050.250.0020.010B0.170.230.0070.009C0.120.170.0050.007D7.908.100.3110.319E18.3018.500.7200.728H19.8020.200.7800.795e0.50 BSC0.020 BSCL0.400.600.0160.024α0°8°0°8°S 0.25 REF 0.010 REFNotes:1.Controlling dimension: millimeters, unlessotherwise specified.2.BSC = Basic lead spacing between centers.3.Dimensions D and E do not include moldflash protrusions and should be measuredfrom the bottom of the package.4.Formed leads shall be planar with respectto one another within 0.004 inches at theseating plane.Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any timewithout notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised toobtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.C06/13/03
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PACKAGING INFORMATION
450-mil Plastic SOPPackage Code: Q (32-pin)NE1E1DSEATING PLANESAeBA1LαCMILLIMETERSSymbolNo. LeadsAA1BCDEE1eLαSMin.Max.32—3.000.10—0.360.510.150.3020.1420.7513.8714.3811.1811.431.27 BSC0.580.990°10°—0.86INCHESMin.Max.—0.1180.004—0.0140.0200.0060.0120.7930.8170.5460.5660.4400.4500.050 BSC0.0230.0390°10°—0.034Notes:1.Controlling dimension: inches, unlessotherwise specified.2.BSC = Basic lead spacing between centers.3.Dimensions D and E1 do not include moldflash protrusions and should be measuredfrom the bottom of the package.4.Formed leads shall be planar with respect toone another within 0.004 inches at theseating plane.Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any timewithout notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised toobtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.C06/13/03
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PACKAGING INFORMATION
Plastic STSOP - 32 pinsPackage Code: H (Type I)A2AA11NEbeD1 DSSEATING PLANELαCPlastic STSOP (H - Type I)MillimetersInchesSymbolMinMaxMinMaxRef. Std.N 32A—1.25—0.049A10.05—0.002—A20.951.050.0370.041b0.170.230.0070.009C0.140.160.00550.0063D13.2013.600.5200.535D111.7011.900.4610.469E7.908.100.3110.319e 0.50 BSC 0.020 BSCL0.300.700.0120.028S 0.28 Typ. 0.011 Typ.α0°5°0°5°Notes:1.Controlling dimension: millimeters, unless otherwisespecified.2.BSC = Basic lead spacing between centers.3.Dimensions D1 and E do not include mold flash protru-sions and should be measured from the bottom of the package.4.Formed leads shall be planar with respect to one anotherwithin 0.004 inches at the seating plane.Integrated Silicon Solution, Inc.PK13197H32 Rev. B 04/21/03
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PACKAGING INFORMATION
Mini Ball Grid Array
Package Code: B (36-pin)
Top View1 2 3 4 5 6Bottom Viewφ b (36x)6 5 4 3 2 1ABCDDEFGHD1eABCDEFGHeEE1Notes:1. Controlling dimensions are in millimeters.A2SEATING PLANEA1AmBGA - 6mm x 8mmMILLIMETERSSym.N0.LeadsAA1A2DD1EE1eb5.90— 0.240.607.90mBGA - 8mm x 10mmINCHESMin.Typ.Max.36MILLIMETERSym.N0.LeadsINCHESMin.Typ.Max.36Min.Typ.Max. 36———5.25BSC6.006.103.75BSC0.75BSC0.300.350.401.200.30—Min.Typ.Max. 36— 0.240.60———5.25BSC7.908.008.103.75BSC0.75BSC0.300.350.401.200.30——0.0090.024 — ——0.0470.012—AA1A2DD1EE1eb—0.0090.024 — ——0.0470.012—8.008.100.3110.3150.3190.207BSC0.2320.2360.2400.148BSC0.030BSC0.0120.0140.0169.9010.0010.100.3900.3940.398.207BSC0.3110.3150.3190.148BSC0.030BSC0.0120.0140.016Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any timewithout notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised toobtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.E01/15/03
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